From 3a9adc4ecd00ad3c2795ee429588c63a5f486a0a Mon Sep 17 00:00:00 2001
From: Timo Aaltonen <timo.aaltonen@canonical.com>
Date: Thu, 9 Jul 2015 17:53:33 +0300
Subject: [PATCH] Revert "drm/i915: remove unused power_well/get_cdclk_freq
 api"

This reverts commit fcf3aac5fc307f0cae429f5844ddc25761662858.

Conflicts:
	drivers/gpu/drm/i915/intel_runtime_pm.c
---

--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -31,6 +31,7 @@
 
 #include "i915_drv.h"
 #include "intel_drv.h"
+#include <drm/i915_powerwell.h>
 
 /**
  * DOC: runtime pm
@@ -52,6 +53,8 @@
 #define GEN9_ENABLE_DC5(dev) 0
 #define SKL_ENABLE_DC6(dev) IS_SKYLAKE(dev)
 
+static struct i915_power_domains *hsw_pwr;
+
 #define for_each_power_well(i, power_well, domain_mask, power_domains)	\
 	for (i = 0;							\
 	     i < (power_domains)->power_well_count &&			\
@@ -1553,12 +1556,15 @@ int intel_power_domains_init(struct drm_
 	 */
 	if (IS_HASWELL(dev_priv->dev)) {
 		set_power_wells(power_domains, hsw_power_wells);
+		hsw_pwr = power_domains;
 	} else if (IS_BROADWELL(dev_priv->dev)) {
 		set_power_wells(power_domains, bdw_power_wells);
+		hsw_pwr = power_domains;
 	} else if (IS_SKYLAKE(dev_priv->dev)) {
 		set_power_wells(power_domains, skl_power_wells);
 	} else if (IS_BROXTON(dev_priv->dev)) {
 		set_power_wells(power_domains, bxt_power_wells);
+		hsw_pwr = power_domains;
 	} else if (IS_CHERRYVIEW(dev_priv->dev)) {
 		set_power_wells(power_domains, chv_power_wells);
 	} else if (IS_VALLEYVIEW(dev_priv->dev)) {
@@ -1602,6 +1608,8 @@ void intel_power_domains_fini(struct drm
 	 * the power well is not enabled, so just enable it in case
 	 * we're going to unload/reload. */
 	intel_display_set_init_power(dev_priv, true);
+
+	hsw_pwr = NULL;
 }
 
 static void intel_power_domains_resume(struct drm_i915_private *dev_priv)
@@ -1838,3 +1846,52 @@ void intel_runtime_pm_enable(struct drm_
 	pm_runtime_put_autosuspend(device);
 }
 
+/* Display audio driver power well request */
+int i915_request_power_well(void)
+{
+	struct drm_i915_private *dev_priv;
+
+	if (!hsw_pwr)
+		return -ENODEV;
+
+	dev_priv = container_of(hsw_pwr, struct drm_i915_private,
+				power_domains);
+	intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(i915_request_power_well);
+
+/* Display audio driver power well release */
+int i915_release_power_well(void)
+{
+	struct drm_i915_private *dev_priv;
+
+	if (!hsw_pwr)
+		return -ENODEV;
+
+	dev_priv = container_of(hsw_pwr, struct drm_i915_private,
+				power_domains);
+	intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(i915_release_power_well);
+
+/*
+ * Private interface for the audio driver to get CDCLK in kHz.
+ *
+ * Caller must request power well using i915_request_power_well() prior to
+ * making the call.
+ */
+int i915_get_cdclk_freq(void)
+{
+	struct drm_i915_private *dev_priv;
+
+	if (!hsw_pwr)
+		return -ENODEV;
+
+	dev_priv = container_of(hsw_pwr, struct drm_i915_private,
+				power_domains);
+
+	return dev_priv->display.get_display_clock_speed(dev_priv->dev);
+}
+EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
