--- libdrm-2.3.0.23+repack+0044.orig/debian/compat
+++ libdrm-2.3.0.23+repack+0044/debian/compat
@@ -0,0 +1 @@
+5
--- libdrm-2.3.0.23+repack+0044.orig/debian/rules
+++ libdrm-2.3.0.23+repack+0044/debian/rules
@@ -0,0 +1,83 @@
+#!/usr/bin/make -f
+# -*- makefile -*-
+# Sample debian/rules that uses debhelper.
+# This file was originally written by Joey Hess and Craig Small.
+# As a special exception, when this file is copied by dh-make into a
+# dh-make output file, you may use that output file without restriction.
+# This special exception was added by Craig Small in version 0.37 of dh-make.
+
+# Uncomment this to turn on verbose mode.
+#export DH_VERBOSE=1
+
+include /usr/share/quilt/quilt.make
+
+# These are used for cross-compiling and for saving the configure script
+# from having to guess our platform (since we know it already)
+DEB_HOST_GNU_TYPE   ?= $(shell dpkg-architecture -qDEB_HOST_GNU_TYPE)
+DEB_BUILD_GNU_TYPE  ?= $(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE)
+
+
+CFLAGS = -Wall -g
+
+ifneq (,$(findstring noopt,$(DEB_BUILD_OPTIONS)))
+	CFLAGS += -O0
+else
+	CFLAGS += -O2
+endif
+
+config.status: configure
+	dh_testdir
+	CFLAGS="$(CFLAGS)" ./configure --host=$(DEB_HOST_GNU_TYPE) --build=$(DEB_BUILD_GNU_TYPE) --prefix=/usr --mandir=\$${prefix}/share/man --infodir=\$${prefix}/share/info --enable-static=yes
+
+build: patch build-stamp
+build-stamp:  config.status
+	dh_testdir
+	$(MAKE)
+	touch build-stamp
+
+clean: unpatch
+	dh_testdir
+	dh_testroot
+	rm -f build-stamp
+	-$(MAKE) distclean
+ifneq "$(wildcard /usr/share/misc/config.sub)" ""
+	cp -f /usr/share/misc/config.sub config.sub
+endif
+ifneq "$(wildcard /usr/share/misc/config.guess)" ""
+	cp -f /usr/share/misc/config.guess config.guess
+endif
+	dh_clean
+
+install: build
+	dh_testdir
+	dh_testroot
+	dh_clean -k
+	dh_installdirs
+	$(MAKE) install DESTDIR=$(CURDIR)/debian/tmp
+
+# Build architecture-independent files here.
+binary-indep: build install
+# We have nothing to do by default.
+
+# Build architecture-dependent files here.
+binary-arch: build install
+	dh_testdir
+	dh_testroot
+	dh_installchangelogs
+	dh_installdocs
+	dh_installexamples
+	dh_install --sourcedir=debian/tmp -Xlibdrm.la --list-missing
+	dh_link
+	dh_strip -plibdrm2 --dbg-package=libdrm2-dbg
+	dh_strip
+	dh_compress
+	dh_fixperms
+	dh_makeshlibs
+	dh_installdeb
+	dh_shlibdeps
+	dh_gencontrol
+	dh_md5sums
+	dh_builddeb
+
+binary: binary-indep binary-arch
+.PHONY: build clean binary-indep binary-arch binary install 
--- libdrm-2.3.0.23+repack+0044.orig/debian/copyright
+++ libdrm-2.3.0.23+repack+0044/debian/copyright
@@ -0,0 +1,58 @@
+This package was debianized by Marcelo E. Magallon <mmagallo@debian.org> on
+Fri, 19 Aug 2005 21:11:18 -0600.
+
+It was downloaded from http://people.freedesktop.org/~ajax/libdrm/
+
+Copyright Holder: Adam Jackson <ajax at nwnk dot net>
+
+License:
+
+ Copyright 2005 Adam Jackson.
+
+ Permission is hereby granted, free of charge, to any person obtaining
+ a copy of this software and associated documentation files (the
+ "Software"), to deal in the Software without restriction, including
+ without limitation on the rights to use, copy, modify, merge,
+ publish, distribute, sub license, and/or sell copies of the Software,
+ and to permit persons to whom the Software is furnished to do so,
+ subject to the following conditions:
+
+ The above copyright notice and this permission notice (including the
+ next paragraph) shall be included in all copies or substantial
+ portions of the Software.
+
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ NON-INFRINGEMENT.  IN NO EVENT SHALL ADAM JACKSON BE LIABLE FOR ANY
+ CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+------------------------------------------------------------------------
+
+ Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ All Rights Reserved.
+
+ Permission is hereby granted, free of charge, to any person obtaining
+ a copy of this software and associated documentation files (the
+ "Software"), to deal in the Software without restriction, including
+ without limitation the rights to use, copy, modify, merge, publish,
+ distribute, sublicense, and/or sell copies of the Software, and to
+ permit persons to whom the Software is furnished to do so, subject to
+ the following conditions:
+
+ The above copyright notice and this permission notice (including the
+ next paragraph) shall be included in all copies or substantial
+ portions of the Software.
+
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ NONINFRINGEMENT.  IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS
+ SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ DEALINGS IN THE SOFTWARE.
+
--- libdrm-2.3.0.23+repack+0044.orig/debian/libdrm-dev.install
+++ libdrm-2.3.0.23+repack+0044/debian/libdrm-dev.install
@@ -0,0 +1,5 @@
+usr/include/*
+usr/lib/lib*.a
+usr/lib/lib*.so
+usr/lib/pkgconfig/*
+usr/lib/*.la
--- libdrm-2.3.0.23+repack+0044.orig/debian/patches/01_psb_headers.patch
+++ libdrm-2.3.0.23+repack+0044/debian/patches/01_psb_headers.patch
@@ -0,0 +1,1004 @@
+Index: libdrm-2.3.0.23+repack+0044/shared-core/Makefile.am
+===================================================================
+--- libdrm-2.3.0.23+repack+0044.orig/shared-core/Makefile.am	2009-03-25 05:06:36.000000000 -0400
++++ libdrm-2.3.0.23+repack+0044/shared-core/Makefile.am	2009-04-22 15:39:31.000000000 -0400
+@@ -29,12 +29,14 @@
+                          i915_drm.h \
+                          mach64_drm.h \
+                          mga_drm.h \
++                         psb_drm.h \
+                          nouveau_drm.h \
+                          r128_drm.h \
+                          radeon_drm.h \
+                          savage_drm.h \
+                          sis_drm.h \
+                          via_drm.h \
++                         psb_reg.h \
+                          r300_reg.h \
+                          via_3d_reg.h
+ 
+Index: libdrm-2.3.0.23+repack+0044/shared-core/Makefile.in
+===================================================================
+--- libdrm-2.3.0.23+repack+0044.orig/shared-core/Makefile.in	2009-03-25 06:13:09.000000000 -0400
++++ libdrm-2.3.0.23+repack+0044/shared-core/Makefile.in	2009-04-22 15:39:31.000000000 -0400
+@@ -188,11 +188,13 @@
+                          i915_drm.h \
+                          mach64_drm.h \
+                          mga_drm.h \
++                         psb_drm.h \
+                          r128_drm.h \
+                          radeon_drm.h \
+                          savage_drm.h \
+                          sis_drm.h \
+                          via_drm.h \
++                         psb_reg.h \
+                          r300_reg.h \
+                          via_3d_reg.h
+ 
+Index: libdrm-2.3.0.23+repack+0044/shared-core/psb_drm.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ libdrm-2.3.0.23+repack+0044/shared-core/psb_drm.h	2009-04-22 15:40:12.000000000 -0400
+@@ -0,0 +1,395 @@
++/**************************************************************************
++ * Copyright (c) 2007, Intel Corporation.
++ * All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
++ * develop this driver.
++ *
++ **************************************************************************/
++/*
++ */
++
++#ifndef _PSB_DRM_H_
++#define _PSB_DRM_H_
++
++#if defined(__linux__) && !defined(__KERNEL__)
++#include<stdint.h>
++#endif
++
++/*
++ * Intel Poulsbo driver package version.
++ *
++ */
++/* #define PSB_PACKAGE_VERSION "ED"__DATE__*/
++#define PSB_PACKAGE_VERSION "5.0.1.0044"
++
++#define DRM_PSB_SAREA_MAJOR 0
++#define DRM_PSB_SAREA_MINOR 1
++#define PSB_FIXED_SHIFT 16
++
++/*
++ * Public memory types.
++ */
++
++#define DRM_PSB_MEM_MMU DRM_BO_MEM_PRIV1
++#define DRM_PSB_FLAG_MEM_MMU DRM_BO_FLAG_MEM_PRIV1
++#define DRM_PSB_MEM_PDS DRM_BO_MEM_PRIV2
++#define DRM_PSB_FLAG_MEM_PDS DRM_BO_FLAG_MEM_PRIV2
++#define DRM_PSB_MEM_APER DRM_BO_MEM_PRIV3
++#define DRM_PSB_FLAG_MEM_APER DRM_BO_FLAG_MEM_PRIV3
++#define DRM_PSB_MEM_RASTGEOM DRM_BO_MEM_PRIV4
++#define DRM_PSB_FLAG_MEM_RASTGEOM DRM_BO_FLAG_MEM_PRIV4
++#define PSB_MEM_RASTGEOM_START   0x30000000
++
++typedef int32_t psb_fixed;
++typedef uint32_t psb_ufixed;
++
++static inline psb_fixed psb_int_to_fixed(int a)
++{
++	return a * (1 << PSB_FIXED_SHIFT);
++}
++
++static inline psb_ufixed psb_unsigned_to_ufixed(unsigned int a)
++{
++	return a << PSB_FIXED_SHIFT;
++}
++
++/*Status of the command sent to the gfx device.*/
++typedef enum {
++	DRM_CMD_SUCCESS,
++	DRM_CMD_FAILED,
++	DRM_CMD_HANG
++} drm_cmd_status_t;
++
++struct drm_psb_scanout {
++	uint32_t buffer_id;	/* DRM buffer object ID */
++	uint32_t rotation;	/* Rotation as in RR_rotation definitions */
++	uint32_t stride;	/* Buffer stride in bytes */
++	uint32_t depth;		/* Buffer depth in bits (NOT) bpp */
++	uint32_t width;		/* Buffer width in pixels */
++	uint32_t height;	/* Buffer height in lines */
++	psb_fixed transform[3][3];	/* Buffer composite transform */
++	/* (scaling, rot, reflect) */
++};
++
++#define DRM_PSB_SAREA_OWNERS 16
++#define DRM_PSB_SAREA_OWNER_2D 0
++#define DRM_PSB_SAREA_OWNER_3D 1
++
++#define DRM_PSB_SAREA_SCANOUTS 3
++
++struct drm_psb_sarea {
++	/* Track changes of this data structure */
++
++	uint32_t major;
++	uint32_t minor;
++
++	/* Last context to touch part of hw */
++	uint32_t ctx_owners[DRM_PSB_SAREA_OWNERS];
++
++	/* Definition of front- and rotated buffers */
++	uint32_t num_scanouts;
++	struct drm_psb_scanout scanouts[DRM_PSB_SAREA_SCANOUTS];
++
++	int planeA_x;
++	int planeA_y;
++	int planeA_w;
++	int planeA_h;
++	int planeB_x;
++	int planeB_y;
++	int planeB_w;
++	int planeB_h;
++	uint32_t msvdx_state;
++	uint32_t msvdx_context;
++};
++
++#define PSB_RELOC_MAGIC         0x67676767
++#define PSB_RELOC_SHIFT_MASK    0x0000FFFF
++#define PSB_RELOC_SHIFT_SHIFT   0
++#define PSB_RELOC_ALSHIFT_MASK  0xFFFF0000
++#define PSB_RELOC_ALSHIFT_SHIFT 16
++
++#define PSB_RELOC_OP_OFFSET     0	/* Offset of the indicated
++					 * buffer
++					 */
++#define PSB_RELOC_OP_2D_OFFSET  1	/* Offset of the indicated
++					 *  buffer, relative to 2D
++					 *  base address
++					 */
++#define PSB_RELOC_OP_PDS_OFFSET 2	/* Offset of the indicated buffer,
++					 *  relative to PDS base address
++					 */
++#define PSB_RELOC_OP_STRIDE     3	/* Stride of the indicated
++					 * buffer (for tiling)
++					 */
++#define PSB_RELOC_OP_USE_OFFSET 4	/* Offset of USE buffer
++					 * relative to base reg
++					 */
++#define PSB_RELOC_OP_USE_REG    5	/* Base reg of USE buffer */
++
++struct drm_psb_reloc {
++	uint32_t reloc_op;
++	uint32_t where;		/* offset in destination buffer */
++	uint32_t buffer;	/* Buffer reloc applies to */
++	uint32_t mask;		/* Destination format: */
++	uint32_t shift;		/* Destination format: */
++	uint32_t pre_add;	/* Destination format: */
++	uint32_t background;	/* Destination add */
++	uint32_t dst_buffer;	/* Destination buffer. Index into buffer_list */
++	uint32_t arg0;		/* Reloc-op dependant */
++	uint32_t arg1;
++};
++
++#define PSB_BO_FLAG_TA              (1ULL << 48)
++#define PSB_BO_FLAG_SCENE           (1ULL << 49)
++#define PSB_BO_FLAG_FEEDBACK        (1ULL << 50)
++#define PSB_BO_FLAG_USSE            (1ULL << 51)
++
++#define PSB_ENGINE_2D 0
++#define PSB_ENGINE_VIDEO 1
++#define PSB_ENGINE_RASTERIZER 2
++#define PSB_ENGINE_TA 3
++#define PSB_ENGINE_HPRAST 4
++
++/*
++ * For this fence class we have a couple of
++ * fence types.
++ */
++
++#define _PSB_FENCE_EXE_SHIFT           0
++#define _PSB_FENCE_TA_DONE_SHIFT       1
++#define _PSB_FENCE_RASTER_DONE_SHIFT   2
++#define _PSB_FENCE_SCENE_DONE_SHIFT    3
++#define _PSB_FENCE_FEEDBACK_SHIFT      4
++
++#define _PSB_ENGINE_TA_FENCE_TYPES   5
++#define _PSB_FENCE_TYPE_TA_DONE     (1 << _PSB_FENCE_TA_DONE_SHIFT)
++#define _PSB_FENCE_TYPE_RASTER_DONE (1 << _PSB_FENCE_RASTER_DONE_SHIFT)
++#define _PSB_FENCE_TYPE_SCENE_DONE  (1 << _PSB_FENCE_SCENE_DONE_SHIFT)
++#define _PSB_FENCE_TYPE_FEEDBACK    (1 << _PSB_FENCE_FEEDBACK_SHIFT)
++
++#define PSB_ENGINE_HPRAST 4
++#define PSB_NUM_ENGINES 5
++
++#define PSB_TA_FLAG_FIRSTPASS    (1 << 0)
++#define PSB_TA_FLAG_LASTPASS     (1 << 1)
++
++#define PSB_FEEDBACK_OP_VISTEST (1 << 0)
++
++/* to eliminate video playback tearing */
++#define PSB_DETEAR
++#ifdef  PSB_DETEAR
++#define PSB_VIDEO_BLIT                  0x0001
++#define PSB_DELAYED_2D_BLIT             0x0002
++typedef struct video_info
++{
++	uint32_t flag;
++	uint32_t x, y, w, h;
++	uint32_t pFBBOHandle;
++	void * pFBVirtAddr;
++} video_info;
++#endif	/* PSB_DETEAR */
++
++struct drm_psb_scene {
++	int handle_valid;
++	uint32_t handle;
++	uint32_t w;
++	uint32_t h;
++	uint32_t num_buffers;
++};
++
++struct drm_psb_hw_info
++{
++        uint32_t rev_id;
++        uint32_t caps;
++};
++
++
++typedef struct drm_psb_cmdbuf_arg {
++	uint64_t buffer_list;	/* List of buffers to validate */
++	uint64_t clip_rects;	/* See i915 counterpart */
++	uint64_t scene_arg;
++	uint64_t fence_arg;
++
++	uint32_t ta_flags;
++
++	uint32_t ta_handle;	/* TA reg-value pairs */
++	uint32_t ta_offset;
++	uint32_t ta_size;
++
++	uint32_t oom_handle;
++	uint32_t oom_offset;
++	uint32_t oom_size;
++
++	uint32_t cmdbuf_handle;	/* 2D Command buffer object or, */
++	uint32_t cmdbuf_offset;	/* rasterizer reg-value pairs */
++	uint32_t cmdbuf_size;
++
++	uint32_t reloc_handle;	/* Reloc buffer object */
++	uint32_t reloc_offset;
++	uint32_t num_relocs;
++
++	int32_t damage;		/* Damage front buffer with cliprects */
++	/* Not implemented yet */
++	uint32_t fence_flags;
++	uint32_t engine;
++
++	/*
++	 * Feedback;
++	 */
++
++	uint32_t feedback_ops;
++	uint32_t feedback_handle;
++	uint32_t feedback_offset;
++	uint32_t feedback_breakpoints;
++	uint32_t feedback_size;
++
++#ifdef PSB_DETEAR
++	video_info sVideoInfo;
++#endif
++} drm_psb_cmdbuf_arg_t;
++
++struct drm_psb_xhw_init_arg {
++	uint32_t operation;
++	uint32_t buffer_handle;
++#ifdef PSB_DETEAR
++	uint32_t tmpBOHandle;
++	void *fbPhys;
++	uint32_t fbSize;
++#endif
++};
++
++/*
++ * Feedback components:
++ */
++
++/*
++ * Vistest component. The number of these in the feedback buffer
++ * equals the number of vistest breakpoints + 1.
++ * This is currently the only feedback component.
++ */
++
++struct drm_psb_vistest {
++	uint32_t vt[8];
++};
++
++#define PSB_HW_COOKIE_SIZE 16
++#define PSB_HW_FEEDBACK_SIZE 8
++#define PSB_HW_OOM_CMD_SIZE 6
++
++struct drm_psb_xhw_arg {
++	uint32_t op;
++	int ret;
++	uint32_t irq_op;
++	uint32_t issue_irq;
++	uint32_t cookie[PSB_HW_COOKIE_SIZE];
++	union {
++		struct {
++			uint32_t w;
++			uint32_t h;
++			uint32_t size;
++			uint32_t clear_p_start;
++			uint32_t clear_num_pages;
++		} si;
++		struct {
++			uint32_t fire_flags;
++			uint32_t hw_context;
++			uint32_t offset;
++			uint32_t engine;
++			uint32_t flags;
++			uint32_t rca;
++			uint32_t num_oom_cmds;
++			uint32_t oom_cmds[PSB_HW_OOM_CMD_SIZE];
++		} sb;
++		struct {
++			uint32_t pages;
++			uint32_t size;
++		} bi;
++		struct {
++			uint32_t bca;
++			uint32_t rca;
++			uint32_t flags;
++		} oom;
++		struct {
++			uint32_t pt_offset;
++			uint32_t param_offset;
++			uint32_t flags;
++		} bl;
++		struct {
++			uint32_t value;
++		} cl;
++		uint32_t feedback[PSB_HW_FEEDBACK_SIZE];
++	} arg;
++};
++
++#define DRM_PSB_CMDBUF          0x00
++#define DRM_PSB_XHW_INIT        0x01
++#define DRM_PSB_XHW             0x02
++#define DRM_PSB_SCENE_UNREF     0x03
++/* Controlling the kernel modesetting buffers */
++#define DRM_PSB_KMS_OFF		0x04
++#define DRM_PSB_KMS_ON		0x05
++#define DRM_PSB_HW_INFO         0x06
++
++#define PSB_XHW_INIT            0x00
++#define PSB_XHW_TAKEDOWN        0x01
++
++#define PSB_XHW_FIRE_RASTER     0x00
++#define PSB_XHW_SCENE_INFO      0x01
++#define PSB_XHW_SCENE_BIND_FIRE 0x02
++#define PSB_XHW_TA_MEM_INFO     0x03
++#define PSB_XHW_RESET_DPM       0x04
++#define PSB_XHW_OOM             0x05
++#define PSB_XHW_TERMINATE       0x06
++#define PSB_XHW_VISTEST         0x07
++#define PSB_XHW_RESUME          0x08
++#define PSB_XHW_TA_MEM_LOAD	0x09
++#define PSB_XHW_CHECK_LOCKUP    0x0a
++#define PSB_XHW_HOTPLUG         0x0b
++
++#define PSB_SCENE_FLAG_DIRTY       (1 << 0)
++#define PSB_SCENE_FLAG_COMPLETE    (1 << 1)
++#define PSB_SCENE_FLAG_SETUP       (1 << 2)
++#define PSB_SCENE_FLAG_SETUP_ONLY  (1 << 3)
++#define PSB_SCENE_FLAG_CLEARED     (1 << 4)
++
++#define PSB_TA_MEM_FLAG_TA            (1 << 0)
++#define PSB_TA_MEM_FLAG_RASTER        (1 << 1)
++#define PSB_TA_MEM_FLAG_HOSTA         (1 << 2)
++#define PSB_TA_MEM_FLAG_HOSTD         (1 << 3)
++#define PSB_TA_MEM_FLAG_INIT          (1 << 4)
++#define PSB_TA_MEM_FLAG_NEW_PT_OFFSET (1 << 5)
++
++/*Raster fire will deallocate memory */
++#define PSB_FIRE_FLAG_RASTER_DEALLOC  (1 << 0)
++/*Isp reset needed due to change in ZLS format */
++#define PSB_FIRE_FLAG_NEEDS_ISP_RESET (1 << 1)
++/*These are set by Xpsb. */
++#define PSB_FIRE_FLAG_XHW_MASK        0xff000000
++/*The task has had at least one OOM and Xpsb will
++  send back messages on each fire. */
++#define PSB_FIRE_FLAG_XHW_OOM         (1 << 24)
++
++#define PSB_SCENE_ENGINE_TA    0
++#define PSB_SCENE_ENGINE_RASTER    1
++#define PSB_SCENE_NUM_ENGINES      2
++
++struct drm_psb_dev_info_arg {
++	uint32_t num_use_attribute_registers;
++};
++#define DRM_PSB_DEVINFO         0x01
++
++#endif
+Index: libdrm-2.3.0.23+repack+0044/shared-core/psb_reg.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ libdrm-2.3.0.23+repack+0044/shared-core/psb_reg.h	2009-04-22 15:40:21.000000000 -0400
+@@ -0,0 +1,562 @@
++/**************************************************************************
++ *
++ * Copyright (c) (2005-2007) Imagination Technologies Limited.
++ * Copyright (c) 2007, Intel Corporation.
++ * All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms and conditions of the GNU General Public License,
++ * version 2, as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 
++ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
++ * develop this driver.
++ *
++ **************************************************************************/
++/*
++ */
++#ifndef _PSB_REG_H_
++#define _PSB_REG_H_
++
++#define PSB_CR_CLKGATECTL                0x0000
++#define _PSB_C_CLKGATECTL_AUTO_MAN_REG   (1 << 24)
++#define _PSB_C_CLKGATECTL_USE_CLKG_SHIFT (20)
++#define _PSB_C_CLKGATECTL_USE_CLKG_MASK  (0x3 << 20)
++#define _PSB_C_CLKGATECTL_DPM_CLKG_SHIFT (16)
++#define _PSB_C_CLKGATECTL_DPM_CLKG_MASK  (0x3 << 16)
++#define _PSB_C_CLKGATECTL_TA_CLKG_SHIFT  (12)
++#define _PSB_C_CLKGATECTL_TA_CLKG_MASK   (0x3 << 12)
++#define _PSB_C_CLKGATECTL_TSP_CLKG_SHIFT (8)
++#define _PSB_C_CLKGATECTL_TSP_CLKG_MASK  (0x3 << 8)
++#define _PSB_C_CLKGATECTL_ISP_CLKG_SHIFT (4)
++#define _PSB_C_CLKGATECTL_ISP_CLKG_MASK  (0x3 << 4)
++#define _PSB_C_CLKGATECTL_2D_CLKG_SHIFT  (0)
++#define _PSB_C_CLKGATECTL_2D_CLKG_MASK   (0x3 << 0)
++#define _PSB_C_CLKGATECTL_CLKG_ENABLED   (0)
++#define _PSB_C_CLKGATECTL_CLKG_DISABLED  (1)
++#define _PSB_C_CLKGATECTL_CLKG_AUTO      (2)
++
++#define PSB_CR_CORE_ID                   0x0010
++#define _PSB_CC_ID_ID_SHIFT              (16)
++#define _PSB_CC_ID_ID_MASK               (0xFFFF << 16)
++#define _PSB_CC_ID_CONFIG_SHIFT          (0)
++#define _PSB_CC_ID_CONFIG_MASK           (0xFFFF << 0)
++
++#define PSB_CR_CORE_REVISION               0x0014
++#define _PSB_CC_REVISION_DESIGNER_SHIFT    (24)
++#define _PSB_CC_REVISION_DESIGNER_MASK     (0xFF << 24)
++#define _PSB_CC_REVISION_MAJOR_SHIFT       (16)
++#define _PSB_CC_REVISION_MAJOR_MASK        (0xFF << 16)
++#define _PSB_CC_REVISION_MINOR_SHIFT       (8)
++#define _PSB_CC_REVISION_MINOR_MASK        (0xFF << 8)
++#define _PSB_CC_REVISION_MAINTENANCE_SHIFT (0)
++#define _PSB_CC_REVISION_MAINTENANCE_MASK  (0xFF << 0)
++
++#define PSB_CR_DESIGNER_REV_FIELD1       0x0018
++
++#define PSB_CR_SOFT_RESET                0x0080
++#define _PSB_CS_RESET_TSP_RESET          (1 << 6)
++#define _PSB_CS_RESET_ISP_RESET          (1 << 5)
++#define _PSB_CS_RESET_USE_RESET          (1 << 4)
++#define _PSB_CS_RESET_TA_RESET           (1 << 3)
++#define _PSB_CS_RESET_DPM_RESET          (1 << 2)
++#define _PSB_CS_RESET_TWOD_RESET         (1 << 1)
++#define _PSB_CS_RESET_BIF_RESET          (1 << 0)
++
++#define PSB_CR_DESIGNER_REV_FIELD2       0x001C
++
++#define PSB_CR_EVENT_HOST_ENABLE2        0x0110
++
++#define PSB_CR_EVENT_STATUS2             0x0118
++
++#define PSB_CR_EVENT_HOST_CLEAR2         0x0114
++#define _PSB_CE2_BIF_REQUESTER_FAULT     (1 << 4)
++
++#define PSB_CR_EVENT_STATUS              0x012C
++
++#define PSB_CR_EVENT_HOST_ENABLE         0x0130
++
++#define PSB_CR_EVENT_HOST_CLEAR          0x0134
++#define _PSB_CE_MASTER_INTERRUPT         (1 << 31)
++#define _PSB_CE_TA_DPM_FAULT             (1 << 28)
++#define _PSB_CE_TWOD_COMPLETE            (1 << 27)
++#define _PSB_CE_DPM_OUT_OF_MEMORY_ZLS    (1 << 25)
++#define _PSB_CE_DPM_TA_MEM_FREE          (1 << 24)
++#define _PSB_CE_PIXELBE_END_RENDER       (1 << 18)
++#define _PSB_CE_SW_EVENT                 (1 << 14)
++#define _PSB_CE_TA_FINISHED              (1 << 13)
++#define _PSB_CE_TA_TERMINATE             (1 << 12)
++#define _PSB_CE_DPM_REACHED_MEM_THRESH   (1 << 3)
++#define _PSB_CE_DPM_OUT_OF_MEMORY_GBL    (1 << 2)
++#define _PSB_CE_DPM_OUT_OF_MEMORY_MT     (1 << 1)
++#define _PSB_CE_DPM_3D_MEM_FREE          (1 << 0)
++
++
++#define PSB_USE_OFFSET_MASK              0x0007FFFF
++#define PSB_USE_OFFSET_SIZE              (PSB_USE_OFFSET_MASK + 1)
++#define PSB_CR_USE_CODE_BASE0            0x0A0C
++#define PSB_CR_USE_CODE_BASE1            0x0A10
++#define PSB_CR_USE_CODE_BASE2            0x0A14
++#define PSB_CR_USE_CODE_BASE3            0x0A18
++#define PSB_CR_USE_CODE_BASE4            0x0A1C
++#define PSB_CR_USE_CODE_BASE5            0x0A20
++#define PSB_CR_USE_CODE_BASE6            0x0A24
++#define PSB_CR_USE_CODE_BASE7            0x0A28
++#define PSB_CR_USE_CODE_BASE8            0x0A2C
++#define PSB_CR_USE_CODE_BASE9            0x0A30
++#define PSB_CR_USE_CODE_BASE10           0x0A34
++#define PSB_CR_USE_CODE_BASE11           0x0A38
++#define PSB_CR_USE_CODE_BASE12           0x0A3C
++#define PSB_CR_USE_CODE_BASE13           0x0A40
++#define PSB_CR_USE_CODE_BASE14           0x0A44
++#define PSB_CR_USE_CODE_BASE15           0x0A48
++#define PSB_CR_USE_CODE_BASE(_i) (0x0A0C + ((_i) << 2))
++#define _PSB_CUC_BASE_DM_SHIFT           (25)
++#define _PSB_CUC_BASE_DM_MASK            (0x3 << 25)
++#define _PSB_CUC_BASE_ADDR_SHIFT         (0) // 1024-bit aligned address?
++#define _PSB_CUC_BASE_ADDR_ALIGNSHIFT    (7)
++#define _PSB_CUC_BASE_ADDR_MASK          (0x1FFFFFF << 0)
++#define _PSB_CUC_DM_VERTEX		 (0)
++#define _PSB_CUC_DM_PIXEL		 (1)
++#define _PSB_CUC_DM_RESERVED		 (2)
++#define _PSB_CUC_DM_EDM	                 (3)
++
++#define PSB_CR_PDS_EXEC_BASE             0x0AB8
++#define _PSB_CR_PDS_EXEC_BASE_ADDR_SHIFT (20) // 1MB aligned address
++#define _PSB_CR_PDS_EXEC_BASE_ADDR_ALIGNSHIFT (20)
++
++#define PSB_CR_EVENT_KICKER              0x0AC4
++#define _PSB_CE_KICKER_ADDRESS_SHIFT     (4) // 128-bit aligned address
++
++#define PSB_CR_EVENT_KICK                0x0AC8
++#define _PSB_CE_KICK_NOW                 (1 << 0)
++
++
++#define PSB_CR_BIF_DIR_LIST_BASE1        0x0C38
++
++#define PSB_CR_BIF_CTRL                  0x0C00
++#define _PSB_CB_CTRL_CLEAR_FAULT         (1 << 4)
++#define _PSB_CB_CTRL_INVALDC             (1 << 3)
++#define _PSB_CB_CTRL_FLUSH               (1 << 2)
++
++#define PSB_CR_BIF_INT_STAT              0x0C04
++
++#define PSB_CR_BIF_FAULT                 0x0C08
++#define _PSB_CBI_STAT_PF_N_RW            (1 << 14)
++#define _PSB_CBI_STAT_FAULT_SHIFT        (0)
++#define _PSB_CBI_STAT_FAULT_MASK         (0x3FFF << 0)
++#define _PSB_CBI_STAT_FAULT_CACHE        (1 << 1)
++#define _PSB_CBI_STAT_FAULT_TA           (1 << 2)
++#define _PSB_CBI_STAT_FAULT_VDM          (1 << 3)
++#define _PSB_CBI_STAT_FAULT_2D           (1 << 4)
++#define _PSB_CBI_STAT_FAULT_PBE          (1 << 5)
++#define _PSB_CBI_STAT_FAULT_TSP          (1 << 6)
++#define _PSB_CBI_STAT_FAULT_ISP          (1 << 7)
++#define _PSB_CBI_STAT_FAULT_USSEPDS      (1 << 8)
++#define _PSB_CBI_STAT_FAULT_HOST         (1 << 9)
++
++#define PSB_CR_BIF_BANK0                 0x0C78
++
++#define PSB_CR_BIF_BANK1                 0x0C7C
++
++#define PSB_CR_BIF_DIR_LIST_BASE0        0x0C84
++
++#define PSB_CR_BIF_TWOD_REQ_BASE         0x0C88
++#define PSB_CR_BIF_3D_REQ_BASE           0x0CAC
++
++#define PSB_CR_2D_SOCIF                  0x0E18
++#define _PSB_C2_SOCIF_FREESPACE_SHIFT    (0)
++#define _PSB_C2_SOCIF_FREESPACE_MASK     (0xFF << 0)
++#define _PSB_C2_SOCIF_EMPTY              (0x80 << 0)
++
++#define PSB_CR_2D_BLIT_STATUS            0x0E04
++#define _PSB_C2B_STATUS_BUSY             (1 << 24)
++#define _PSB_C2B_STATUS_COMPLETE_SHIFT   (0)
++#define _PSB_C2B_STATUS_COMPLETE_MASK    (0xFFFFFF << 0)
++
++/*
++ * 2D defs.
++ */
++
++/*
++ * 2D Slave Port Data : Block Header's Object Type
++ */
++
++#define	PSB_2D_CLIP_BH                   (0x00000000)
++#define	PSB_2D_PAT_BH                    (0x10000000)
++#define	PSB_2D_CTRL_BH                   (0x20000000)
++#define	PSB_2D_SRC_OFF_BH                (0x30000000)
++#define	PSB_2D_MASK_OFF_BH               (0x40000000)
++#define	PSB_2D_RESERVED1_BH              (0x50000000)
++#define	PSB_2D_RESERVED2_BH              (0x60000000)
++#define	PSB_2D_FENCE_BH                  (0x70000000)
++#define	PSB_2D_BLIT_BH                   (0x80000000)
++#define	PSB_2D_SRC_SURF_BH               (0x90000000)
++#define	PSB_2D_DST_SURF_BH               (0xA0000000)
++#define	PSB_2D_PAT_SURF_BH               (0xB0000000)
++#define	PSB_2D_SRC_PAL_BH                (0xC0000000)
++#define	PSB_2D_PAT_PAL_BH                (0xD0000000)
++#define	PSB_2D_MASK_SURF_BH              (0xE0000000)
++#define	PSB_2D_FLUSH_BH                  (0xF0000000)
++
++/*
++ * Clip Definition block (PSB_2D_CLIP_BH)
++ */
++#define PSB_2D_CLIPCOUNT_MAX             (1)
++#define PSB_2D_CLIPCOUNT_MASK            (0x00000000)
++#define PSB_2D_CLIPCOUNT_CLRMASK         (0xFFFFFFFF)
++#define PSB_2D_CLIPCOUNT_SHIFT           (0)
++// clip rectangle min & max
++#define PSB_2D_CLIP_XMAX_MASK            (0x00FFF000)
++#define PSB_2D_CLIP_XMAX_CLRMASK         (0xFF000FFF)
++#define PSB_2D_CLIP_XMAX_SHIFT           (12)
++#define PSB_2D_CLIP_XMIN_MASK            (0x00000FFF)
++#define PSB_2D_CLIP_XMIN_CLRMASK         (0x00FFF000)
++#define PSB_2D_CLIP_XMIN_SHIFT           (0)
++// clip rectangle offset
++#define PSB_2D_CLIP_YMAX_MASK            (0x00FFF000)
++#define PSB_2D_CLIP_YMAX_CLRMASK         (0xFF000FFF)
++#define PSB_2D_CLIP_YMAX_SHIFT           (12)
++#define PSB_2D_CLIP_YMIN_MASK            (0x00000FFF)
++#define PSB_2D_CLIP_YMIN_CLRMASK         (0x00FFF000)
++#define PSB_2D_CLIP_YMIN_SHIFT           (0)
++
++/*
++ * Pattern Control (PSB_2D_PAT_BH)
++ */
++#define PSB_2D_PAT_HEIGHT_MASK           (0x0000001F)
++#define PSB_2D_PAT_HEIGHT_SHIFT          (0)
++#define PSB_2D_PAT_WIDTH_MASK            (0x000003E0)
++#define PSB_2D_PAT_WIDTH_SHIFT           (5)
++#define PSB_2D_PAT_YSTART_MASK           (0x00007C00)
++#define PSB_2D_PAT_YSTART_SHIFT          (10)
++#define PSB_2D_PAT_XSTART_MASK           (0x000F8000)
++#define PSB_2D_PAT_XSTART_SHIFT          (15)
++
++/*
++ * 2D Control block (PSB_2D_CTRL_BH)
++ */
++// Present Flags
++#define PSB_2D_SRCCK_CTRL                (0x00000001)
++#define PSB_2D_DSTCK_CTRL                (0x00000002)
++#define PSB_2D_ALPHA_CTRL                (0x00000004)
++// Colour Key Colour (SRC/DST)
++#define PSB_2D_CK_COL_MASK               (0xFFFFFFFF)
++#define PSB_2D_CK_COL_CLRMASK            (0x00000000)
++#define PSB_2D_CK_COL_SHIFT              (0)
++// Colour Key Mask (SRC/DST)
++#define PSB_2D_CK_MASK_MASK              (0xFFFFFFFF)
++#define PSB_2D_CK_MASK_CLRMASK           (0x00000000)
++#define PSB_2D_CK_MASK_SHIFT             (0)
++// Alpha Control (Alpha/RGB)
++#define PSB_2D_GBLALPHA_MASK             (0x000FF000)
++#define PSB_2D_GBLALPHA_CLRMASK          (0xFFF00FFF)
++#define PSB_2D_GBLALPHA_SHIFT            (12)
++#define PSB_2D_SRCALPHA_OP_MASK          (0x00700000)
++#define PSB_2D_SRCALPHA_OP_CLRMASK       (0xFF8FFFFF)
++#define PSB_2D_SRCALPHA_OP_SHIFT         (20)
++#define PSB_2D_SRCALPHA_OP_ONE           (0x00000000)
++#define PSB_2D_SRCALPHA_OP_SRC           (0x00100000)
++#define PSB_2D_SRCALPHA_OP_DST           (0x00200000)
++#define PSB_2D_SRCALPHA_OP_SG            (0x00300000)
++#define PSB_2D_SRCALPHA_OP_DG            (0x00400000)
++#define PSB_2D_SRCALPHA_OP_GBL           (0x00500000)
++#define PSB_2D_SRCALPHA_OP_ZERO          (0x00600000)
++#define PSB_2D_SRCALPHA_INVERT           (0x00800000)
++#define PSB_2D_SRCALPHA_INVERT_CLR       (0xFF7FFFFF)
++#define PSB_2D_DSTALPHA_OP_MASK          (0x07000000)
++#define PSB_2D_DSTALPHA_OP_CLRMASK       (0xF8FFFFFF)
++#define PSB_2D_DSTALPHA_OP_SHIFT         (24)
++#define PSB_2D_DSTALPHA_OP_ONE           (0x00000000)
++#define PSB_2D_DSTALPHA_OP_SRC           (0x01000000)
++#define PSB_2D_DSTALPHA_OP_DST           (0x02000000)
++#define PSB_2D_DSTALPHA_OP_SG            (0x03000000)
++#define PSB_2D_DSTALPHA_OP_DG            (0x04000000)
++#define PSB_2D_DSTALPHA_OP_GBL           (0x05000000)
++#define PSB_2D_DSTALPHA_OP_ZERO          (0x06000000)
++#define PSB_2D_DSTALPHA_INVERT           (0x08000000)
++#define PSB_2D_DSTALPHA_INVERT_CLR       (0xF7FFFFFF)
++
++#define PSB_2D_PRE_MULTIPLICATION_ENABLE  (0x10000000)
++#define PSB_2D_PRE_MULTIPLICATION_CLRMASK (0xEFFFFFFF)
++#define PSB_2D_ZERO_SOURCE_ALPHA_ENABLE   (0x20000000)
++#define PSB_2D_ZERO_SOURCE_ALPHA_CLRMASK  (0xDFFFFFFF)
++
++/*
++ *Source Offset (PSB_2D_SRC_OFF_BH)
++ */
++#define PSB_2D_SRCOFF_XSTART_MASK        ((0x00000FFF) << 12)
++#define PSB_2D_SRCOFF_XSTART_SHIFT       (12)
++#define PSB_2D_SRCOFF_YSTART_MASK        (0x00000FFF)
++#define PSB_2D_SRCOFF_YSTART_SHIFT       (0)
++
++/*
++ * Mask Offset (PSB_2D_MASK_OFF_BH)
++ */
++#define PSB_2D_MASKOFF_XSTART_MASK       ((0x00000FFF) << 12)
++#define PSB_2D_MASKOFF_XSTART_SHIFT      (12)
++#define PSB_2D_MASKOFF_YSTART_MASK       (0x00000FFF)
++#define PSB_2D_MASKOFF_YSTART_SHIFT      (0)
++
++/*
++ * 2D Fence (see PSB_2D_FENCE_BH): bits 0:27 are ignored
++ */
++
++/*
++ *Blit Rectangle (PSB_2D_BLIT_BH)
++ */
++
++#define PSB_2D_ROT_MASK                  (3<<25)
++#define PSB_2D_ROT_CLRMASK               (~PSB_2D_ROT_MASK)
++#define PSB_2D_ROT_NONE                  (0<<25)
++#define PSB_2D_ROT_90DEGS                (1<<25)
++#define PSB_2D_ROT_180DEGS               (2<<25)
++#define PSB_2D_ROT_270DEGS               (3<<25)
++
++#define PSB_2D_COPYORDER_MASK            (3<<23)
++#define PSB_2D_COPYORDER_CLRMASK         (~PSB_2D_COPYORDER_MASK)
++#define PSB_2D_COPYORDER_TL2BR           (0<<23)
++#define PSB_2D_COPYORDER_BR2TL           (1<<23)
++#define PSB_2D_COPYORDER_TR2BL           (2<<23)
++#define PSB_2D_COPYORDER_BL2TR           (3<<23)
++
++#define PSB_2D_DSTCK_CLRMASK             (0xFF9FFFFF)
++#define PSB_2D_DSTCK_DISABLE             (0x00000000)
++#define PSB_2D_DSTCK_PASS                (0x00200000)
++#define PSB_2D_DSTCK_REJECT              (0x00400000)
++
++#define PSB_2D_SRCCK_CLRMASK             (0xFFE7FFFF)
++#define PSB_2D_SRCCK_DISABLE             (0x00000000)
++#define PSB_2D_SRCCK_PASS                (0x00080000)
++#define PSB_2D_SRCCK_REJECT              (0x00100000)
++
++#define PSB_2D_CLIP_ENABLE               (0x00040000)
++
++#define PSB_2D_ALPHA_ENABLE              (0x00020000)
++
++#define PSB_2D_PAT_CLRMASK               (0xFFFEFFFF)
++#define PSB_2D_PAT_MASK                  (0x00010000)
++#define PSB_2D_USE_PAT                   (0x00010000)
++#define PSB_2D_USE_FILL                  (0x00000000)
++/*
++ * Tungsten Graphics note on rop codes: If rop A and rop B are
++ * identical, the mask surface will not be read and need not be
++ * set up.
++ */
++
++#define PSB_2D_ROP3B_MASK                (0x0000FF00)
++#define PSB_2D_ROP3B_CLRMASK             (0xFFFF00FF)
++#define PSB_2D_ROP3B_SHIFT               (8)
++// rop code A
++#define PSB_2D_ROP3A_MASK                (0x000000FF)
++#define PSB_2D_ROP3A_CLRMASK             (0xFFFFFF00)
++#define PSB_2D_ROP3A_SHIFT               (0)
++
++#define PSB_2D_ROP4_MASK                 (0x0000FFFF)
++/*
++ *	DWORD0:	(Only pass if Pattern control == Use Fill Colour)
++ *	Fill Colour RGBA8888
++ */
++#define PSB_2D_FILLCOLOUR_MASK           (0xFFFFFFFF)
++#define PSB_2D_FILLCOLOUR_SHIFT          (0)
++/*
++ *	DWORD1: (Always Present)
++ *	X Start (Dest)
++ *	Y Start (Dest)
++ */
++#define PSB_2D_DST_XSTART_MASK           (0x00FFF000)
++#define PSB_2D_DST_XSTART_CLRMASK        (0xFF000FFF)
++#define PSB_2D_DST_XSTART_SHIFT          (12)
++#define PSB_2D_DST_YSTART_MASK           (0x00000FFF)
++#define PSB_2D_DST_YSTART_CLRMASK        (0xFFFFF000)
++#define PSB_2D_DST_YSTART_SHIFT          (0)
++/*
++ *	DWORD2: (Always Present)
++ *	X Size (Dest)
++ *	Y Size (Dest)
++ */
++#define PSB_2D_DST_XSIZE_MASK            (0x00FFF000)
++#define PSB_2D_DST_XSIZE_CLRMASK         (0xFF000FFF)
++#define PSB_2D_DST_XSIZE_SHIFT           (12)
++#define PSB_2D_DST_YSIZE_MASK            (0x00000FFF)
++#define PSB_2D_DST_YSIZE_CLRMASK         (0xFFFFF000)
++#define PSB_2D_DST_YSIZE_SHIFT           (0)
++
++/*
++ * Source Surface (PSB_2D_SRC_SURF_BH)
++ */
++/*
++ *      WORD 0
++ */
++
++#define PSB_2D_SRC_FORMAT_MASK           (0x00078000)
++#define PSB_2D_SRC_1_PAL                 (0x00000000)
++#define PSB_2D_SRC_2_PAL                 (0x00008000)
++#define PSB_2D_SRC_4_PAL                 (0x00010000)
++#define PSB_2D_SRC_8_PAL                 (0x00018000)
++#define PSB_2D_SRC_8_ALPHA               (0x00020000)
++#define PSB_2D_SRC_4_ALPHA               (0x00028000)
++#define PSB_2D_SRC_332RGB                (0x00030000)
++#define PSB_2D_SRC_4444ARGB              (0x00038000)
++#define PSB_2D_SRC_555RGB                (0x00040000)
++#define PSB_2D_SRC_1555ARGB              (0x00048000)
++#define PSB_2D_SRC_565RGB                (0x00050000)
++#define PSB_2D_SRC_0888ARGB              (0x00058000)
++#define PSB_2D_SRC_8888ARGB              (0x00060000)
++#define PSB_2D_SRC_8888UYVY              (0x00068000)
++#define PSB_2D_SRC_RESERVED              (0x00070000)
++#define PSB_2D_SRC_1555ARGB_LOOKUP       (0x00078000)
++
++
++#define PSB_2D_SRC_STRIDE_MASK           (0x00007FFF)
++#define PSB_2D_SRC_STRIDE_CLRMASK        (0xFFFF8000)
++#define PSB_2D_SRC_STRIDE_SHIFT          (0)
++/*
++ *  WORD 1 - Base Address
++ */
++#define PSB_2D_SRC_ADDR_MASK             (0x0FFFFFFC)
++#define PSB_2D_SRC_ADDR_CLRMASK          (0x00000003)
++#define PSB_2D_SRC_ADDR_SHIFT            (2)
++#define PSB_2D_SRC_ADDR_ALIGNSHIFT       (2)
++
++/*
++ * Pattern Surface (PSB_2D_PAT_SURF_BH)
++ */
++/*
++ *  WORD 0
++ */
++
++#define PSB_2D_PAT_FORMAT_MASK           (0x00078000)
++#define PSB_2D_PAT_1_PAL                 (0x00000000)
++#define PSB_2D_PAT_2_PAL                 (0x00008000)
++#define PSB_2D_PAT_4_PAL                 (0x00010000)
++#define PSB_2D_PAT_8_PAL                 (0x00018000)
++#define PSB_2D_PAT_8_ALPHA               (0x00020000)
++#define PSB_2D_PAT_4_ALPHA               (0x00028000)
++#define PSB_2D_PAT_332RGB                (0x00030000)
++#define PSB_2D_PAT_4444ARGB              (0x00038000)
++#define PSB_2D_PAT_555RGB                (0x00040000)
++#define PSB_2D_PAT_1555ARGB              (0x00048000)
++#define PSB_2D_PAT_565RGB                (0x00050000)
++#define PSB_2D_PAT_0888ARGB              (0x00058000)
++#define PSB_2D_PAT_8888ARGB              (0x00060000)
++
++#define PSB_2D_PAT_STRIDE_MASK           (0x00007FFF)
++#define PSB_2D_PAT_STRIDE_CLRMASK        (0xFFFF8000)
++#define PSB_2D_PAT_STRIDE_SHIFT          (0)
++/*
++ *  WORD 1 - Base Address
++ */
++#define PSB_2D_PAT_ADDR_MASK             (0x0FFFFFFC)
++#define PSB_2D_PAT_ADDR_CLRMASK          (0x00000003)
++#define PSB_2D_PAT_ADDR_SHIFT            (2)
++#define PSB_2D_PAT_ADDR_ALIGNSHIFT       (2)
++
++/*
++ * Destination Surface (PSB_2D_DST_SURF_BH)
++ */
++/*
++ * WORD 0
++ */
++
++#define PSB_2D_DST_FORMAT_MASK           (0x00078000)
++#define PSB_2D_DST_332RGB                (0x00030000)
++#define PSB_2D_DST_4444ARGB              (0x00038000)
++#define PSB_2D_DST_555RGB                (0x00040000)
++#define PSB_2D_DST_1555ARGB              (0x00048000)
++#define PSB_2D_DST_565RGB                (0x00050000)
++#define PSB_2D_DST_0888ARGB              (0x00058000)
++#define PSB_2D_DST_8888ARGB              (0x00060000)
++#define PSB_2D_DST_8888AYUV              (0x00070000)
++
++#define PSB_2D_DST_STRIDE_MASK           (0x00007FFF)
++#define PSB_2D_DST_STRIDE_CLRMASK        (0xFFFF8000)
++#define PSB_2D_DST_STRIDE_SHIFT          (0)
++/*
++ * WORD 1 - Base Address
++ */
++#define PSB_2D_DST_ADDR_MASK             (0x0FFFFFFC)
++#define PSB_2D_DST_ADDR_CLRMASK          (0x00000003)
++#define PSB_2D_DST_ADDR_SHIFT            (2)
++#define PSB_2D_DST_ADDR_ALIGNSHIFT       (2)
++
++/*
++ * Mask Surface (PSB_2D_MASK_SURF_BH)
++ */
++/*
++ * WORD 0
++ */
++#define PSB_2D_MASK_STRIDE_MASK          (0x00007FFF)
++#define PSB_2D_MASK_STRIDE_CLRMASK       (0xFFFF8000)
++#define PSB_2D_MASK_STRIDE_SHIFT         (0)
++/*
++ *  WORD 1 - Base Address
++ */
++#define PSB_2D_MASK_ADDR_MASK            (0x0FFFFFFC)
++#define PSB_2D_MASK_ADDR_CLRMASK         (0x00000003)
++#define PSB_2D_MASK_ADDR_SHIFT           (2)
++#define PSB_2D_MASK_ADDR_ALIGNSHIFT      (2)
++
++/*
++ * Source Palette (PSB_2D_SRC_PAL_BH)
++ */
++
++#define PSB_2D_SRCPAL_ADDR_SHIFT         (0)
++#define PSB_2D_SRCPAL_ADDR_CLRMASK       (0xF0000007)
++#define PSB_2D_SRCPAL_ADDR_MASK          (0x0FFFFFF8)
++#define PSB_2D_SRCPAL_BYTEALIGN          (1024)
++
++/*
++ * Pattern Palette (PSB_2D_PAT_PAL_BH)
++ */
++
++#define PSB_2D_PATPAL_ADDR_SHIFT         (0)
++#define PSB_2D_PATPAL_ADDR_CLRMASK       (0xF0000007)
++#define PSB_2D_PATPAL_ADDR_MASK          (0x0FFFFFF8)
++#define PSB_2D_PATPAL_BYTEALIGN          (1024)
++
++/*
++ * Rop3 Codes (2 LS bytes)
++ */
++
++#define PSB_2D_ROP3_SRCCOPY              (0xCCCC)
++#define PSB_2D_ROP3_PATCOPY              (0xF0F0)
++#define PSB_2D_ROP3_WHITENESS            (0xFFFF)
++#define PSB_2D_ROP3_BLACKNESS            (0x0000)
++#define PSB_2D_ROP3_SRC                  (0xCC)
++#define PSB_2D_ROP3_PAT                  (0xF0)
++#define PSB_2D_ROP3_DST                  (0xAA)
++
++
++/*
++ * Sizes.
++ */
++
++#define PSB_SCENE_HW_COOKIE_SIZE 16
++#define PSB_TA_MEM_HW_COOKIE_SIZE 16
++
++/*
++ * Scene stuff.
++ */
++
++#define PSB_NUM_HW_SCENES          2
++
++/*
++ * Scheduler completion actions.
++ */
++
++#define PSB_RASTER_BLOCK 0
++#define PSB_RASTER       1
++#define PSB_RETURN       2
++#define PSB_TA       3
++
++
++#endif
--- libdrm-2.3.0.23+repack+0044.orig/debian/patches/series
+++ libdrm-2.3.0.23+repack+0044/debian/patches/series
@@ -0,0 +1 @@
+01_psb_headers.patch
--- libdrm-2.3.0.23+repack+0044.orig/debian/libdrm2.NEWS
+++ libdrm-2.3.0.23+repack+0044/debian/libdrm2.NEWS
@@ -0,0 +1,8 @@
+libdrm (2.3.0-4) experimental; urgency=low
+
+  * We are now shipping libdrm with the default permissions set to 666,
+    rather than the upstream default of 660. If you have untrusted users,
+    you should configure the X server to explicitly use a mode of 660 in
+    the xorg.conf.
+
+ -- David Nusinow <dnusinow@debian.org>  Wed, 18 Apr 2007 22:44:21 -0400
--- libdrm-2.3.0.23+repack+0044.orig/debian/control
+++ libdrm-2.3.0.23+repack+0044/debian/control
@@ -0,0 +1,48 @@
+Source: libdrm
+Priority: optional
+Maintainer: Ubuntu Core Developers <ubuntu-devel-discuss@lists.ubuntu.com>
+XSBC-Original-Maintainer: Debian X Strike Force <debian-x@lists.debian.org>
+Uploaders: Thierry Reding <thierry@gilfi.de>, Julien Cristau <jcristau@debian.org>, David Nusinow <dnusinow@debian.org>
+Build-Depends: debhelper (>= 5.0.0), autotools-dev, libx11-dev, dpkg-dev (>= 1.13.19), quilt (>= 0.40)
+Standards-Version: 3.7.2
+Section: libs
+
+Package: libdrm-dev
+Section: libdevel
+Architecture: any
+Depends: libdrm2 (= ${binary:Version})
+Description: Userspace interface to kernel DRM services -- development files
+ This library implements the userspace interface to the kernel DRM
+ services.  DRM stands for "Direct Rendering Manager", which is the
+ kernelspace portion of the "Direct Rendering Infrastructure" (DRI).
+ The DRI is currently used on Linux to provide hardware-accelerated
+ OpenGL drivers.
+ .
+ This package provides the development environment for libdrm.
+
+Package: libdrm2
+Section: libs
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Description: Userspace interface to kernel DRM services -- runtime
+ This library implements the userspace interface to the kernel DRM
+ services.  DRM stands for "Direct Rendering Manager", which is the
+ kernelspace portion of the "Direct Rendering Infrastructure" (DRI).
+ The DRI is currently used on Linux to provide hardware-accelerated
+ OpenGL drivers.
+ .
+ This package provides the runtime environment for libdrm.
+
+Package: libdrm2-dbg
+Section: libdevel
+Priority: extra
+Architecture: any
+Depends: libdrm2 (= ${binary:Version})
+Description: Userspace interface to kernel DRM services -- debugging symbols
+ This library implements the userspace interface to the kernel DRM
+ services.  DRM stands for "Direct Rendering Manager", which is the
+ kernelspace portion of the "Direct Rendering Infrastructure" (DRI).
+ The DRI is currently used on Linux to provide hardware-accelerated
+ OpenGL drivers.
+ .
+ This package provides debugging symbols for the libdrm2 package.
--- libdrm-2.3.0.23+repack+0044.orig/debian/libdrm-dev.dirs
+++ libdrm-2.3.0.23+repack+0044/debian/libdrm-dev.dirs
@@ -0,0 +1,2 @@
+usr/lib
+usr/include
--- libdrm-2.3.0.23+repack+0044.orig/debian/watch
+++ libdrm-2.3.0.23+repack+0044/debian/watch
@@ -0,0 +1,3 @@
+version=3
+
+http://dri.freedesktop.org/libdrm/libdrm-(.*)\.tar\.gz
--- libdrm-2.3.0.23+repack+0044.orig/debian/libdrm2.dirs
+++ libdrm-2.3.0.23+repack+0044/debian/libdrm2.dirs
@@ -0,0 +1 @@
+usr/lib
--- libdrm-2.3.0.23+repack+0044.orig/debian/changelog
+++ libdrm-2.3.0.23+repack+0044/debian/changelog
@@ -0,0 +1,288 @@
+libdrm (2.3.0.23+repack+0044-0netbook1) netbook-common; urgency=low
+
+  * New upstream release (Build 0044)
+  * Renamed build 0040 tarball for naming consistency; 0044 tarball had
+    no material changes from 0040.
+  * debian/patches/01_psb_headers.patch: Update with psb_drm.h from the 0044 build
+
+ -- Steve Magoun <steve.magoun@canonical.com>  Wed, 22 Apr 2009 15:25:55 -0400
+
+libdrm (2.3.0.23+repack+0040-0netbook1) netbook-common; urgency=low
+
+  * New upstream release (Build 0040)
+  * Repacked upstream tarball. Only change seems to be a new configure script
+  * debian/patches/01_psb_headers.patch: Update with psb_drm.h from the 0040 build
+
+ -- Steve Magoun <steve.magoun@canonical.com>  Fri, 17 Apr 2009 14:17:24 -0400
+
+libdrm (2.3.0.23+repack-0netbook4) netbook-common; urgency=low
+
+  * debian/patches/01_psb_headers.patch: Update with psb_drm.h from the 0038 build
+
+ -- Steve Magoun <steve.magoun@canonical.com>  Thu, 26 Mar 2009 14:02:12 -0400
+
+libdrm (2.3.0.23+repack-0netbook3) netbook-common; urgency=low
+
+  * No change except rebuilt against 2.6.24-22.35netbook23 lum headers (which
+    correspond to 2.3.0.32L.0038)
+
+ -- Alberto Milone <alberto.milone@canonical.com>  Fri, 20 Mar 2009 16:29:46 +0100
+
+libdrm (2.3.0.23+repack-0netbook2) netbook-common; urgency=low
+
+  * No change except rebuilt against 2.6.24-22.35netbook15 lum headers (which
+    correspond to 2.3.0.32L.0033)
+
+ -- Debbie Beliveau <debbie.beliveau@canonical.com>  Tue, 17 Feb 2009 20:49:48 +0000
+
+libdrm (2.3.0.23+repack-0netbook1) netbook-common; urgency=low
+
+  * New release from Intel (Intel version is really 2.3.0-23). Corresponds to
+    2.3.0.32L.0032.
+    - Upstream changelog:
+      + remove the workaround for xserver restart issue
+  * Update patches/01_psb_headers.patch to latest psb_drm.h from 2.3.0.32L.0032
+
+ -- Steve Magoun <steve.magoun@canonical.com>  Wed, 11 Feb 2009 17:07:06 -0500
+
+libdrm (2.3.0.22+repack~0netbook3) hardy; urgency=low
+
+  * New Upstream Version
+
+ -- Michael Frey <michael.frey@canonical.com>  Fri, 06 Feb 2009 16:09:53 +0000
+
+libdrm (2.3.0.22+repack~0netbook2) hardy; urgency=low
+
+  * New upstream release
+
+ -- Michael Frey <michael.frey@canonical.com>  Tue, 03 Feb 2009 11:05:39 -0500
+
+libdrm (2.3.0.22+repack~0netbook1-1) hardy; urgency=low
+
+  * New upstream release
+
+ -- root <michael.frey@canonical.com>  Wed, 21 Jan 2009 16:05:18 +0000
+
+libdrm (2.3.0.16-0ubuntu2~804um4) hardy; urgency=low
+
+  * Update patch 01_psb_headers to include shared-core/psb_drm.h
+    which is version 2.3.0.32L.0029
+
+ -- Michael Frey <michael.frey@canonical.com>  Wed, 07 Jan 2009 17:01:57 -0500
+
+libdrm (2.3.0.16-0ubuntu2~804um3) hardy; urgency=low
+
+  * Update patch 01_psb_headers to include shared-core/psb_drm.h from
+    hardy-lum's tip (currently b42597272f1ca0a7a1aa97495cefe001e7fa6759) which
+    has version 2.2.0.32L.0020.
+
+ -- Loic Minier <lool@dooz.org>  Fri, 07 Nov 2008 10:06:10 +0100
+
+libdrm (2.3.0.16-0ubuntu2~804um2) hardy; urgency=low
+
+  * Drop Xs-Vcs headers as we're not using this repo.
+
+ -- Loic Minier <lool@dooz.org>  Tue, 14 Oct 2008 21:46:46 +0200
+
+libdrm (2.3.0.16-0ubuntu2~804um1) intrepid; urgency=low
+
+  * Update with newest psb-kmb headers.  Changes since last version:
+    + Update PSB_PACKAGE_VERSION from "2.0.0.32L.0014" to "2.1.0.32L.0019"
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Mon, 30 Jun 2008 11:11:32 -0700
+
+libdrm (2.3.0.16-0ubuntu1~804um2) hardy; urgency=low
+
+  * Add 01_psb_headers.patch:
+    - Provide missing header files from psb-kmd.  Unclear why these
+      weren't there before; without them -psb won't build.
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Tue, 27 May 2008 15:15:37 -0700
+
+libdrm (2.3.0.16-0ubuntu1~804um1) hardy; urgency=low
+
+  * Forked release of libdrm from Intel
+    - Normally Intel provides a patch with just the diffs against libdrm
+      that they need, but this time they only provided us with an
+      already patched tarball with no easy way to isolate the changes.
+    - Upstream changes since beta6 include:
+      - a memory leak get fixed
+      - added  DRM_BO_HINT_PRESUMED_OFFSET to drm.h
+      - added DRM_MODE_TYPE_USERPREF to drm.h
+      - changed DRM_IOCTL_TIMEOUT_USEC from 3 sec to 30 sec.
+  * Drop 00_poulsbo_libdrm_update.patch
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Thu, 15 May 2008 22:17:05 +0000
+
+libdrm (2.3.0-4ubuntu4~804um1) hardy; urgency=low
+
+  * Replacing beta3 patches with new beta6 00_poulsbo_libdrm_update.patch
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Thu, 31 Jan 2008 11:02:05 -0800
+
+libdrm (2.3.0-4ubuntu3~804um1) gutsy; urgency=low
+
+  * Restoring the 00_poulsbo_libdrm_update.patch, which was
+    inadvertantly dropped in the prior change's cleanup.
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Thu, 17 Jan 2008 13:00:49 -0800
+
+libdrm (2.3.0-4ubuntu2~804um2) hardy; urgency=low
+
+  * Clear old patches from debian/patches/ directory
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Wed, 16 Jan 2008 11:24:26 -0800
+
+libdrm (2.3.0-4ubuntu2~psb1) gutsy; urgency=low
+
+  * Incorporate patches from poulsbo
+  * Dropped all Debian changes outside debian/ directory.  These seem to
+    be conflicting with the patch from Intel, so I'm assuming they
+    duplicate stuff in the Intel patch.
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Wed, 16 Jan 2008 11:23:54 -0800
+
+libdrm (2.3.0-4ubuntu1) gutsy; urgency=low
+
+  [ Jacob Pan ]
+  * debian/patches/100_poulsbo_libdrm_update.patch:
+    - Incorporate changes to libdrm for the Poulsbo driver
+  * debian/patches/101_poulsbo_headers.patch:
+    - Header files required to build driver
+
+ -- Bryce Harrington <bryce@ubuntu.com>  Wed,  1 Aug 2007 18:10:14 -0700
+
+libdrm (2.3.0-4) unstable; urgency=low
+
+  [ David Nusinow ]
+  * Add NEWS.Debian explaining the change in the last upload to interested
+    administrators.
+
+  [ Julien Cristau ]
+  * Upload to unstable.
+
+ -- Julien Cristau <jcristau@debian.org>  Fri, 20 Apr 2007 05:06:34 +0200
+
+libdrm (2.3.0-3) experimental; urgency=low
+
+  * Add myself to uploaders
+  * Patch libdrm to default to device permission 666 so we don't have to do it
+    in xorg.conf. The only way libdrm can do anything is through the server
+    anyway. This can still be overridden by a user's xorg.conf. This change
+    also requires adding quilt to the build-depends
+
+ -- David Nusinow <dnusinow@debian.org>  Sun, 15 Apr 2007 13:08:50 -0400
+
+libdrm (2.3.0-2) unstable; urgency=low
+
+  * Update my email address in debian/control.
+  * Add XS-Vcs-Git and XS-Vcs-Browser in debian/control.
+  * Upload to unstable.
+
+ -- Julien Cristau <jcristau@debian.org>  Thu, 12 Apr 2007 19:06:57 +0200
+
+libdrm (2.3.0-1) experimental; urgency=low
+
+  [ Thierry Reding ]
+  * New upstream release.
+  * Set the Debian X Strike Force as maintainer.
+  * Add myself to uploaders.
+  * Add a debugging symbol package for libdrm2.
+
+  [ Julien Cristau ]
+  * Bump shlibs to libdrm2 >= 2.3.0.
+  * Add myself to uploaders.
+  * Add build-dep on dpkg-dev >= 1.13.19 to make sure that the binary:Version
+    substvar is available.
+  * libdrm2-dbg depends on libdrm2 (= ${binary:Version}).
+  * Don't install libdrm.la, and use dh_install --list-missing.
+
+ -- Julien Cristau <julien.cristau@ens-lyon.org>  Thu,  4 Jan 2007 18:56:08 +0100
+
+libdrm (2.2.0-0.1) experimental; urgency=low
+
+  * Non-maintainer upload.
+  * New upstream release.
+  * Bump Standards-Version to 3.7.2, no changes required.
+  * Bump debhelper compatibility to 5 and adjust build-dependency.
+  * Don't try to install pkgconfig files from usr/share/pkgconfig because
+    there is nothing in that directory.
+
+ -- Thierry Reding <thierry@gilfi.de>  Sat, 18 Nov 2006 19:50:26 +0100
+
+libdrm (2.0.2-0.1) unstable; urgency=low
+
+  * Non-maintainer upload.
+  * New upstream release (closes: #377166).
+    - Includes a fix for FTBFS on GNU/kFreeBSD (closes: #332994).
+  * Manually force static build.
+
+ -- Andres Salomon <dilinger@debian.org>  Sat, 23 Sep 2006 06:32:23 +0000
+
+libdrm (2.0.1-1) unstable; urgency=high
+
+  * New upstream release
+    - Fixes a pathological hash table smash discovered by the Coverity scanner
+    - updates the installed header files for various new #defines
+
+ -- David Nusinow <dnusinow@debian.org>  Tue,  4 Apr 2006 23:46:05 -0400
+
+libdrm (2.0-1) experimental; urgency=low
+
+  * First upload to Debian
+
+ -- David Nusinow <dnusinow@debian.org>  Thu,  5 Jan 2006 22:45:27 -0500
+
+libdrm (2.0-0ubuntu1) dapper; urgency=low
+
+  * New upstream release.
+  * Change binary package from libdrm1 to libdrm2, following soversion bump.
+
+ -- Daniel Stone <daniel.stone@ubuntu.com>  Mon, 12 Dec 2005 13:05:22 +1100
+
+libdrm (1.0.5-0ubuntu1) dapper; urgency=low
+
+  * New upstream version.
+
+ -- Daniel Stone <daniel.stone@ubuntu.com>  Wed,  2 Nov 2005 01:56:07 +1100
+
+libdrm (1.0.3-3) unstable; urgency=low
+
+  * Yay for understandable bug reports! *gmprf*
+  * debian/control:libdrm1 =~ s/development/runtime/ (closes: bug#325515)
+
+ -- Marcelo E. Magallon <mmagallo@debian.org>  Fri, 16 Sep 2005 09:46:05 -0600
+
+libdrm (1.0.3-2) unstable; urgency=low
+
+  * libdrm.pc.in: add -ldrm to Libs
+
+ -- Marcelo E. Magallon <mmagallo@debian.org>  Thu, 08 Sep 2005 20:49:01 -0600
+
+libdrm (1.0.3-1) unstable; urgency=low
+
+  * New upstream
+
+ -- Marcelo E. Magallon <mmagallo@debian.org>  Sun, 28 Aug 2005 11:12:07 -0600
+
+libdrm (1.0.2-3) unstable; urgency=low
+
+  * debian/control: it's "Direct Rendering Infraestructure".  I was rather
+    sure it stand for interface... thanks Michel.  (closes: bug#324514)
+  * debian/control: forgot to actually write this in the file.  Build-Depends
+    on libx11-dev.  Thanks Kurt (closes: bug#324560)
+
+ -- Marcelo E. Magallon <mmagallo@debian.org>  Sun, 28 Aug 2005 11:01:41 -0600
+
+libdrm (1.0.2-2) unstable; urgency=low
+
+  * Forgot to fix the other broken bit :-P
+
+ -- Marcelo E. Magallon <mmagallo@debian.org>  Fri, 19 Aug 2005 22:01:32 -0600
+
+libdrm (1.0.2-1) unstable; urgency=low
+
+  * Initial release. Closes: #324074
+
+ -- Marcelo E. Magallon <mmagallo@debian.org>  Fri, 19 Aug 2005 21:11:18 -0600
+
--- libdrm-2.3.0.23+repack+0044.orig/debian/libdrm2.shlibs
+++ libdrm-2.3.0.23+repack+0044/debian/libdrm2.shlibs
@@ -0,0 +1 @@
+libdrm 2 libdrm2 (>= 2.3.0)
--- libdrm-2.3.0.23+repack+0044.orig/debian/libdrm2.install
+++ libdrm-2.3.0.23+repack+0044/debian/libdrm2.install
@@ -0,0 +1 @@
+usr/lib/lib*.so.*
